Analog Devices ADSP-SC58 Series Hardware Reference Manual page 637

Port x GPIO Polarity Invert Clear Register
The
PORT_POL_CLR
PORT_POL register description.
PX15 (R/W1C)
Port x Bit 15 Polarity Invert Clear
PX14 (R/W1C)
Port x Bit 14 Polarity Invert Clear
PX13 (R/W1C)
Port x Bit 13 Polarity Invert Clear
PX12 (R/W1C)
Port x Bit 12 Polarity Invert Clear
PX11 (R/W1C)
Port x Bit 11 Polarity Invert Clear
PX10 (R/W1C)
Port x Bit 10 Polarity Invert Clear
PX9 (R/W1C)
Port x Bit 9 Polarity Invert Clear
PX8 (R/W1C)
Port x Bit 8 Polarity Invert Clear
Figure 14-23: PORT_POL_CLR Register Diagram
Table 14-24: PORT_POL_CLR Register Fields
Bit No.
(Access)
15 PX15
(R/W1C)
14 PX14
(R/W1C)
13 PX13
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register disables polarity inversion for GPIO pins. For more information, see the
15 14 13 12 11
0 0 0 0 0
31 30 29 28 27
0 0 0 0 0
Bit Name
Port x Bit 15 Polarity Invert Clear.
Port x Bit 14 Polarity Invert Clear.
Port x Bit 13 Polarity Invert Clear.
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
26 25 24 23 22 21 20 19
0 0 0 0 0 0 0 0
Description/Enumeration
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
ADSP-SC58x PORT Register Descriptions
2 1 0
0 0 0
PX0 (R/W1C)
Port x Bit 0 Polarity Invert Clear
PX1 (R/W1C)
Port x Bit 1 Polarity Invert Clear
PX2 (R/W1C)
Port x Bit 2 Polarity Invert Clear
PX3 (R/W1C)
Port x Bit 3 Polarity Invert Clear
PX4 (R/W1C)
Port x Bit 4 Polarity Invert Clear
PX5 (R/W1C)
Port x Bit 5 Polarity Invert Clear
PX6 (R/W1C)
Port x Bit 6 Polarity Invert Clear
PX7 (R/W1C)
Port x Bit 7 Polarity Invert Clear
18 17 16
0 0 0
14–65