Timer Block Diagram............................................................................................................................... 20–4

Internal Interface ...................................................................................................................................... 20–4

Internal Timer Connections .................................................................................................................. 20–4

External Interface ..................................................................................................................................... 20–5

GP Timer Operating Modes ........................................................................................................................ 20–5

General Operation.................................................................................................................................... 20–5

Period, Width and Delay Register Interaction ....................................................................................... 20–6

Single-Pulse PWMOUT Mode ................................................................................................................ 20–7

Continuous PWMOUT Mode ................................................................................................................. 20–7

Width Capture (WIDCAP) Mode ............................................................................................................ 20–9

Width Capture Mode Overflow........................................................................................................... 20–12

Windowed Watchdog (WATCHDOG) Modes ...................................................................................... 20–14

Windowed Watchdog Width Mode .................................................................................................... 20–14

Windowed Watchdog Period Mode..................................................................................................... 20–16

Pin Interrupt (PININT) Mode............................................................................................................... 20–18

External Clock (EXTCLK) Mode .......................................................................................................... 20–18

GP Timer Programming Concepts ............................................................................................................ 20–19

Setting Up Constantly Changing Timer Conditions .............................................................................. 20–19

Configuring, Enabling, and Disabling One or More Timers................................................................... 20–20

Configuring Timer Data and Status Interrupts ...................................................................................... 20–20

Using the Timer Broadcast Feature......................................................................................................... 20–20

Timer Illegal States ................................................................................................................................... 20–21

Continuous PWMOUT Mode ............................................................................................................... 20–22

Single Pulse PWMOUT Mode............................................................................................................... 20–23

WIDCAP Mode ..................................................................................................................................... 20–23

EXTCLK Mode ...................................................................................................................................... 20–23

WATCHDOG Events............................................................................................................................. 20–24

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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

Table of Contents