Analog Devices ADSP-SC58 Series Hardware Reference Manual page 206

Sharc+ processor
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DPM Operating Modes
DPM
Acronym for the dynamic power management (DPM) controller.
Full-on mode
The normal operating mode in which all clock domains are derived from the PLL.
PCU
Acronym for the PLL control unit (PCU).
PLL
Acronym for the phase-locked loop (PLL).
RCU
Acronym for the reset control unit (RCU).
DPM Operating Modes
The DPM includes several operating modes. The modes are:
• Reset
• Full-on
Reset State
Reset is the initial state of the processor and is the result of a hardware or software triggered event. The DPM itself
does not trigger entering reset. The external SYS_HWRST pin or the RCU triggers entering reset. The DPM re-
sponds to reset by transitioning to its default state.
From Reset, the DPM always transitions to PLL Bypassed state.
Full-on Mode
Full-on mode is the default state of the DPM after Reset.
In full-on mode, the processor can reach its maximum clock rate and power dissipation can be at its highest.
5–2
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

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