Analog Devices ADSP-SC58 Series Hardware Reference Manual page 707

Sharc+ processor
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16 Serial Peripheral Interface (SPI)
The serial peripheral interface is an industry-standard synchronous serial link that supports communication with
multiple SPI-compatible devices. The baseline SPI peripheral is a synchronous, four-wire interface consisting of two
data pins, one device select pin, and a gated clock pin. The two data pins allow full-duplex operation to other SPI-
compatible devices. Two extra (optional) data pins are provided on specific SPIs to support quad SPI operation.
Enhanced modes of operation such as flow control, fast mode, and dual-I/O mode (DIOM) are also supported. In
addition, a direct memory access (DMA) mode allows for transferring several words with minimal CPU interaction.
With a range of configurable options, the SPI ports provide a glueless hardware interface with other SPI-compatible
devices in master mode, slave mode, and multimaster environments. The SPI peripheral includes programmable
baud rates, clock phase, and clock polarity. The peripheral can operate in a multimaster environment by interfacing
with several other devices, acting as either a master device or a slave device. In a multimaster environment, the SPI
peripheral uses open-drain outputs to avoid data bus contention. The flow control features enable slow slave devices
to interface with fast master devices by providing an SPI ready pin which flexibly controls the transfers.
All SPI peripherals (SPI0, SPI1 and SPI2) on the ADSP-SC58x/ADSP-2158x processors operate on the
NOTE:
SCLK1_0 domain. The term SCLK in this chapter is a generic reference to SCLK1_0. For more details on
SCLK1_0 programming refer the Clock Generation Unit (CGU) chapter.
SPI Features
The SPI module supports the following features:
• Full-duplex, synchronous serial interface
• 8, 16-bit and 32-bit word sizes
• Programmable baud rate, clock phase, and polarity
• Programmable inter-frame latency
• Flow control
• Support for Fast and DIOM modes
• Quad and memory-mapped modes are supported by SPI2 only
• Independent receive and transmit DMA channels
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Serial Peripheral Interface (SPI)
16–1

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