Analog Devices ADSP-SC58 Series Hardware Reference Manual page 286

Sharc+ processor
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Table 7-16: SEC_FCTL Register Fields (Continued)
Bit No.
(Access)
0
EN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Enable.
The SEC_FCTL.EN bit controls the operational state of the SEC. Clearing the
SEC_FCTL.EN bit halts the execution of the SEC without resetting status registers.
Setting the SEC_FCTL.EN bit enables the SEC to begin or resume operation with
the current configuration and status.
ADSP-SC58x SEC Register Descriptions
Description/Enumeration
0 Disable
1 Enable
7–41

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