Analog Devices ADSP-SC58 Series Hardware Reference Manual page 561

Sharc+ processor
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Table 13-14: SMPU_RCTL[n] Register Fields (Continued)
Bit No.
(Access)
8
RPROTEN
(R/W)
5:1
SIZE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Read Transaction Protection Enable.
The SMPU_RCTL[n].RPROTEN bit enable bit to turn on protection against ID-
based read transactions for the memory region.
Memory Region Size.
The SMPU_RCTL[n].SIZE bit defines the size of the memory region to be protect-
ed.
ADSP-SC58x SMPU Register Descriptions
Description/Enumeration
0 Read transaction ID-based protection disabled
1 Read transaction ID-based protection enabled
0 4 KB
1 8 KB
2 16 KB
3 32 KB
4 64 KB
5 128 KB
6 256 KB
7 512 KB
8 1 MB
9 2 MB
10 4 MB
11 8 MB
12 16 MB
13 32 MB
14 64 MB
15 128 MB
16 256 MB
17 512 MB
18 1 GB
19 2 GB
20 4 GB
21-31 Reserved
13–25

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