Analog Devices ADSP-SC58 Series Hardware Reference Manual page 117

Mixed-Signal Control Processors
The ADSP-CM40x processors are based on the ARM Cortex
and industrial applications.
The ADSP-CM41x processors are based on the ARM Cortex-M4 and ARM Cortex-M0 cores and are de-
signed for motor control and industrial applications.
How to Use this Manual
This section describes how this manual is organized and where you can find specific types of information.
This manual is organized such that it aligns with the
structure is:
ARM Cortex Overview
Power and Clock Management
• Clock Generation Unit (CGU)
• Dynmic Power Management (DPM)
• Reset Control Unit (RCU)
System Interrupts and Triggers
• System Event Control (SEC)
• Trigger Routing Unit (TRU)
System Memory (L2CTL/DMC/SMC/OTPC/SMPU)
• L2 Controller (L2CTL)
• Dynamic Memory Congtroller (DMC)
• Static Memory Controller (SMC)
• One-Time Programmable Memory Controller (OTPC)
• System Memory Protection Unit (SMPU)
Peripherals:
• GPIO
• Timers and Counters
• General-Purpose Counter (CNT)
• General-Purpose Timer (TMR)
• Watchdog Timer (WDOG)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
®
-M4 core and are designed for motor control
Figure 1-1 ADSP-SC58x Functional Block Diagram. This
cxvii