Analog Devices ADSP-SC58 Series Hardware Reference Manual page 868

Sharc+ processor
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EPPI Status, Error, and Interrupt Signals
The EPPI generates error interrupts (flagged in the
ditions occur.
• EPPI_STAT.YFIFOERR (YFIFO underflow or overflow)
• EPPI_STAT.CFIFOERR (CFIFO underflow or overflow)
• EPPI_STAT.LTERROVR (line track overflow error)
• EPPI_STAT.LTERRUNDR (line track underflow error)
• EPPI_STAT.FTERROVR (frame track overflow error)
• EPPI_STAT.FTERRUNDR (frame track underflow error)
• EPPI_STAT.ERRNCOR (ITU preamble error not corrected)
A W1C (write-1-to-clear) operation clears the error conditions. Each of the individual conditions which cause an
EPPI error interrupt can be masked. The interrupt mask register (EPPI_IMSK) allows the masking of individual
conditions which cause error interrupts.
There is only one interrupt line from each EPPI so all interrupts are internally OR'ed and sent as a single interrupt
to the core. The
EPPI_STAT
these errors in detail.
Frame and Line Track Errors
In external frame sync mode, the EPPI uses line track error (EPPI_STAT.LTERROVR and
EPPI_STAT.LTERRUNDR) and frame track error (EPPI_STAT.FTERROVR and
EPPI_STAT.FTERRUNDR) status bits to monitor the line and frame synchronization errors. The EPPI updates
the bits when there is a mismatch detected in the HSYNC and VSYNC as compared to the programmed values in
EPPI_LINE
and
EPPI_FRAME
Line Track Errors
The line track overflow (EPPI_STAT.LTERROVR) and underflow errors (EPPI_STAT.LTERRUNDR) generate
a maskable interrupt as soon as the EPPI identifies them and not at the next frame sync.
• If the frame sync has not arrived when the
error is generated.
• When the
EPPI_LINE
error is generated. A W1C operation clears boths interrupts.
Frame Track Errors
The frame track overflow (EPPI_STAT.FTERROVR) and underflow errors (EPPI_STAT.FTERRUNDR) gener-
ate a maskable interrupt as soon as the EPPI identifies them. When the EPPI_FRAME.VALUE counter expires,
the EPPI_STAT.FTERROVR error is reported before the next frame sync arrives.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
EPPI_STAT
register must then be read to discover specific errors. The following sections describe
count registers.
EPPI_LINE
counter is running and a frame sync is detected, the EPPI_STAT.LTERRUNDR
register) when any one of the following error con-
counter expires, then the EPPI_STAT.LTERROVR
EPPI Event Control
18–29

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