Analog Devices ADSP-SC58 Series Hardware Reference Manual page 661

PINT Mask Clear Register
The
PINT_MSK_CLR
PINT_MSK_CLR masks the corresponding pin interrupt.
PIQ15 (R/W1C)
Pin Interrupt 15 Mask
PIQ14 (R/W1C)
Pin Interrupt 14 Mask
PIQ13 (R/W1C)
Pin Interrupt 13 Mask
PIQ12 (R/W1C)
Pin Interrupt 12 Mask
PIQ11 (R/W1C)
Pin Interrupt 11 Mask
PIQ10 (R/W1C)
Pin Interrupt 10 Mask
PIQ9 (R/W1C)
Pin Interrupt 9 Mask
PIQ8 (R/W1C)
Pin Interrupt 8 Mask
PIQ31 (R/W1C)
Pin Interrupt 31 Mask
PIQ30 (R/W1C)
Pin Interrupt 30 Mask
PIQ29 (R/W1C)
Pin Interrupt 29 Mask
PIQ28 (R/W1C)
Pin Interrupt 28 Mask
PIQ27 (R/W1C)
Pin Interrupt 27 Mask
PIQ26 (R/W1C)
Pin Interrupt 26 Mask
PIQ25 (R/W1C)
Pin Interrupt 25 Mask
PIQ24 (R/W1C)
Pin Interrupt 24 Mask
Figure 14-31: PINT_MSK_CLR Register Diagram
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register permits masking (disabling) of interrupt requests. Writing 1 to a bit in
15 14 13 12 11
0 0 0 0 0
31 30 29 28 27
0 0 0 0 0
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
26 25 24 23 22 21 20 19
0 0 0 0 0 0 0 0
ADSP-SC58x PINT Register Descriptions
2 1 0
0 0 0
PIQ0 (R/W1C)
Pin Interrupt 0 Mask
PIQ1 (R/W1C)
Pin Interrupt 1 Mask
PIQ2 (R/W1C)
Pin Interrupt 2 Mask
PIQ3 (R/W1C)
Pin Interrupt 3 Mask
PIQ4 (R/W1C)
Pin Interrupt 4 Mask
PIQ5 (R/W1C)
Pin Interrupt 5 Mask
PIQ6 (R/W1C)
Pin Interrupt 6 Mask
PIQ7 (R/W1C)
Pin Interrupt 7 Mask
18 17 16
0 0 0
PIQ16 (R/W1C)
Pin Interrupt 16 Mask
PIQ17 (R/W1C)
Pin Interrupt 17 Mask
PIQ18 (R/W1C)
Pin Interrupt 18 Mask
PIQ19 (R/W1C)
Pin Interrupt 19 Mask
PIQ20 (R/W1C)
Pin Interrupt 20 Mask
PIQ21 (R/W1C)
Pin Interrupt 21 Mask
PIQ22 (R/W1C)
Pin Interrupt 22 Mask
PIQ23 (R/W1C)
Pin Interrupt 23 Mask
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