Analog Devices ADSP-SC58 Series Hardware Reference Manual page 294

Table 7-23: SEC_FSTAT Register Fields (Continued)
Bit No.
(Access)
8 PND
(R/NW)
5:4 ERRC
(R/NW)
1 ERR
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Pending Fault.
The SEC_FSTAT.PND bit indicates a fault source has signaled a fault assertion to the
SEC, but the SEC has not yet triggered the event actions due to the delay selected with
the SEC_FDLY
when the
SEC_FSTAT.PND bit is only set when the SEC_FSTAT.ACT bit is cleared. The
SEC updates the
SEC_FSTAT.PND bit is set. The SEC_FSTAT.PND bit is cleared either by the SEC
fault interface when the current delay count in the
or by writing the SEC_FSID.SID field value (which indicates the ID of the asserted
fault) to the
Error Cause.
When the SEC_FSTAT.ERR bit is asserted, the SEC updates SEC_FSTAT.ERRC
field to convey the interrupt source error type. When the error type is source overflow,
the status indicates that a source signal assertion occurred or an SEC raise operation
was attempted while pending was already set. The source overflow is detected when
the source is set for edge only. When the error type is end error, the status indicates
that an end was received for a source while the SEC_FSTAT.ACT bit was not set.
Error.
The SEC_FSTAT.ERR bit indicates an SEC fault interface error. When
SEC_FSTAT.ERR is set, the SEC updates the SEC_FSTAT.ERRC field to indicate
the corresponding error cause. When multiple errors occur, the
captures the status for the first error and does not capture subsequent errors until the
status is cleared.
Description/Enumeration
register. The SEC fault interface sets the SEC_FSTAT.PND bit
SEC_FSID is updated on assertion of a fault source input. The
SEC_FSID register with the SID value when the
SEC_FEND register.
0 Not Pending
1 Pending
0 Source Overflow Error
1 Reserved
2 End Error
3 Reserved
0 No Error
1 Error Occurred
ADSP-SC58x SEC Register Descriptions
register expires
SEC_FDLY_CUR
SEC_FSTAT register
7–49