Analog Devices ADSP-SC58 Series Hardware Reference Manual page 31

Channel D Control Register ................................................................................................................ 19–101
Channel D-High Duty-0 Register ....................................................................................................... 19–103
Channel D-High Pulse Heightened-Precision Duty Register 0 ............................................................ 19–104
Channel D-High Pulse Duty Register 1 ............................................................................................... 19–105
Channel D High Pulse Heightened-Precision Duty Register 1 ............................................................ 19–106
Channel D-High Full Duty0 Register .................................................................................................. 19–107
Channel D-High Full Duty1 Register .................................................................................................. 19–108
Channel D-Low Pulse Duty Register 0 ................................................................................................ 19–109
Channel D-Low Heightened-Precision Duty-0 Register ...................................................................... 19–110
Channel D-Low Pulse Duty Register 1 ................................................................................................ 19–111
Channel D-Low Heightened-Precision Duty-1 Register ...................................................................... 19–112
Channel A Delay Register .................................................................................................................... 19–113
Channel B Delay Register .................................................................................................................... 19–114
Channel C Delay Register ................................................................................................................... 19–115
Channel D Delay Register ................................................................................................................... 19–116
Channel D-Low Full Duty0 Register ................................................................................................... 19–117
Channel D-Low Full Duty1 Register ................................................................................................... 19–118
Interrupt Latch Register ...................................................................................................................... 19–119
Interrupt Mask Register ....................................................................................................................... 19–121
Status Register ..................................................................................................................................... 19–123
Sync Pulse Width Register ................................................................................................................... 19–128
Timer 0 Period Register ....................................................................................................................... 19–129
Timer 1 Period Register ....................................................................................................................... 19–130
Timer 2 Period Register ....................................................................................................................... 19–131
Timer 3 Period Register ....................................................................................................................... 19–132
Timer 4 Period Register ....................................................................................................................... 19–133
Trip Configuration Register ................................................................................................................. 19–134
General-Purpose Timer (TIMER)
GP Timer Features....................................................................................................................................... 20–1
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference xxxi