Analog Devices ADSP-SC58 Series Hardware Reference Manual page 764

Sharc+ processor
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ADSP-SC58x SPI Register Descriptions
Table 16-26: SPI_MMRDH Register Fields (Continued)
Bit No.
(Access)
28
CMDSKIP
(R/W)
27
WRAP
(R/W)
26
MERGE
(R/W)
16–58
Bit Name
Command Skip Enable.
The SPI_MMRDH.CMDSKIP bit enables command skip mode where the address is
sent first and the OPCODE field is not sent (SPI_MMRDH.CMDSKIP bit =1). This
mode is useful for supporting XIP (Execute-In-Place) operation where only the address
is sent and the same read command is assumed. The SPI flash device must be primed
with an initial read command, before the SPI_MMRDH.CMDSKIP bit is set.
SPI Memory Wrap Indicator.
The SPI_MMRDH.WRAP bit must be set by software if software places a connected
SPI memory device into a 8-byte, 16-byte or 32-byte wrap mode based on the ILINE
and DLINE field setting of the cache configuration register address wrap mode. Soft-
ware achieves this by transmitting a vendor specified command to the SPI memory de-
vice while the SPI_CTL.MMSE bit =0.
If the SPI_MMRDH.WRAP bit =1, the SPI does not need to deassert the SPI slave se-
lect signal and resend the read header in order to wrap to the cache line base when
servicing misaligned cache fill requests. Although this improves cache fill efficiency, it
requires that the SPI deassert the SPI slave select pin and resend the read header when-
ever a DMA burst requests crosses 32 byte alignments. Setting this bit improves cache
throughput but decreases DMA throughput.
Merge Enable.
When the SPI_MMRDH.MERGE bit is set, SPI hardware combines the two successive
transfers. This increases the throughput rate when accessing a large number of sequen-
tial memory locations. For more information refer to the Merged Read Accesses sec-
tion.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 OPCODE field is sent first followed by address
1 OPCODE field is not sent; address is sent first
0 SPI Memory auto increments address purely sequential-
ly
1 SPI Memory auto increments address but wraps within
32 Byte lines

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