Table of Contents
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Emphasized Audio Data................................................................................................................... 37–10
Single-Channel Double-Frequency Mode......................................................................................... 37–10
Clock Recovery Modes ........................................................................................................................ 37–10
Interrupts................................................................................................................................................... 37–11
Sources ................................................................................................................................................... 37–11
Transmit Block Start ........................................................................................................................... 37–11
Receiver Status .................................................................................................................................... 37–11
Receiver Error...................................................................................................................................... 37–11
Masking.................................................................................................................................................. 37–11
Service .................................................................................................................................................... 37–12
Programming Model.................................................................................................................................. 37–12
Programming the Transmitter ................................................................................................................ 37–12
Programming the Receiver...................................................................................................................... 37–12
Interrupted Data Streams on the Receiver .............................................................................................. 37–13
Debug Features .......................................................................................................................................... 37–13
Loopback Routing .................................................................................................................................. 37–13
ADSP-SC58x SPDIF Register Descriptions .............................................................................................. 37–13
Receive Control ..................................................................................................................................... 37–15
Receive Status Register .......................................................................................................................... 37–17
Receive Status A0 Register ..................................................................................................................... 37–20
Receive Status B0 Register ..................................................................................................................... 37–21
Receive Status A1 Register ..................................................................................................................... 37–22
Receive Status B1 Register ..................................................................................................................... 37–23
Transmit Control Register ..................................................................................................................... 37–24
Transmit Status A0 Register .................................................................................................................. 37–27
Transmit Status A1 Register .................................................................................................................. 37–28
Transmit Status A2 Register .................................................................................................................. 37–29
Transmit Status A3 Register .................................................................................................................. 37–30
Transmit Status A4 Register .................................................................................................................. 37–31
Transmit Status A5 Register .................................................................................................................. 37–32
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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