Analog Devices ADSP-SC58 Series Hardware Reference Manual page 471

Table 10-34: DMC_TR0 Register Fields (Continued)
Bit No.
(Access)
7:4 TWTR
(R/W)
3:0 TRCD
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Timing Write to Read.
The DMC_TR0.TWTR field selects the write-to-read delay time (t
number of clock cycles that occur from the last write data to the next read command.
Timing RAS to CAS Delay.
The DMC_TR0.TRCD field selects the RAS to CAS delay time (t
number of clock cycles that occur from an active command to a read/write assertion.
ADSP-SC58x DMC Register Descriptions
Description/Enumeration
), which is the
WTR
), which is the
RCD
10–65