Analog Devices ADSP-SC58 Series Hardware Reference Manual page 660

ADSP-SC58x PINT Register Descriptions
Table 14-32: PINT_LATCH Register Fields (Continued)
Bit No.
(Access)
14 PIQ14
(R/W1C)
13 PIQ13
(R/W1C)
12 PIQ12
(R/W1C)
11 PIQ11
(R/W1C)
10 PIQ10
(R/W1C)
9 PIQ9
(R/W1C)
8 PIQ8
(R/W1C)
7 PIQ7
(R/W1C)
6 PIQ6
(R/W1C)
5 PIQ5
(R/W1C)
4 PIQ4
(R/W1C)
3 PIQ3
(R/W1C)
2 PIQ2
(R/W1C)
1 PIQ1
(R/W1C)
0 PIQ0
(R/W1C)
14–88
Bit Name
Pin Interrupt 14 Latch.
If the PINT_LATCH.PIQ14 bit is set, the request is latched.
Pin Interrupt 13 Latch.
If the PINT_LATCH.PIQ13 bit is set, the request is latched.
Pin Interrupt 12 Latch.
If the PINT_LATCH.PIQ12 bit is set, the request is latched.
Pin Interrupt 11 Latch.
If the PINT_LATCH.PIQ11 bit is set, the request is latched.
Pin Interrupt 10 Latch.
If the PINT_LATCH.PIQ10 bit is set, the request is latched.
Pin Interrupt 9 Latch.
If the PINT_LATCH.PIQ9 bit is set, the request is latched.
Pin Interrupt 8 Latch.
If the PINT_LATCH.PIQ8 bit is set, the request is latched.
Pin Interrupt 7 Latch.
If the PINT_LATCH.PIQ7 bit is set, the request is latched.
Pin Interrupt 6 Latch.
If the PINT_LATCH.PIQ6 bit is set, the request is latched.
Pin Interrupt 5 Latch.
If the PINT_LATCH.PIQ5 bit is set, the request is latched.
Pin Interrupt 4 Latch.
If the PINT_LATCH.PIQ4 bit is set, the request is latched.
Pin Interrupt 3 Latch.
If the PINT_LATCH.PIQ3 bit is set, the request is latched.
Pin Interrupt 2 Latch.
If the PINT_LATCH.PIQ2 bit is set, the request is latched.
Pin Interrupt 1 Latch.
If the PINT_LATCH.PIQ1 bit is set, the request is latched.
Pin Interrupt 0 Latch.
If the PINT_LATCH.PIQ0 bit is set, the request is latched.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration