Analog Devices ADSP-SC58 Series Hardware Reference Manual page 938

Figure 19-10: Channel Outputs in Dependent Mode for Pulse Mode = 10
Figure 19-11: Channel Outputs in Dependent Mode for Pulse Mode = 11
Channel High Side and Low Side Outputs, Independent Operation Mode
Independent control of the
PWM_CHANCFG.MODELSA bit to 1. In this case, the PWM module:
• Generates PWM_AH using the
• Uses the
PWM_AH1
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
DT
DUTY0
DT
DUTY1
PWM_AH
PWM_AL
PWM_AH
PWM_AL
PWM_AH
PWM_AL
PWM_AH
PWM_AL
and
PWM_AH0 PWM_AL0
PWM_AH0 register
register to configure pulse width
DT
DT
Case with Zero Dead-time
Case with non-zero dead-time
PULSEMODE = 10
DT
DT
DT
DT
Case with Zero Dead-time
Case with non-zero dead-time
PULSEMODE = 11
channel outputs is possible by setting the
Channel Timing Control Unit
DUTY1
DUTY0
19–17