Analog Devices ADSP-SC58 Series Hardware Reference Manual page 892

Sharc+ processor
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Table 18-47: ADSP-SC58x EPPI Register List
Name
EPPI_CLKDIV
EPPI_CTL
EPPI_CTL2
EPPI_EVENCLIP
EPPI_FRAME
EPPI_FS1_DLY
EPPI_FS1_PASPL
EPPI_FS1_WLHB
EPPI_FS2_DLY
EPPI_FS2_PALPF
EPPI_FS2_WLVB
EPPI_HCNT
EPPI_HDLY
EPPI_IMSK
EPPI_LINE
EPPI_ODDCLIP
EPPI_STAT
EPPI_VCNT
EPPI_VDLY
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Clock Divide Register
Control Register
Control Register 2 Register
Clipping Register for EVEN (Luma) Data Register
Lines Per Frame Register
Frame Sync 1 Delay Value Register
FS1 Period Register / EPPI Active Samples Per Line Register
FS1 Width Register / EPPI Horizontal Blanking Samples Per Line Register
Frame Sync 2 Delay Value Register
FS2 Period Register / EPPI Active Lines Per Field Register
FS2 Width Register / EPPI Lines Of Vertical Blanking Register
Horizontal Transfer Count Register
Horizontal Delay Count Register
Interrupt Mask Register
Samples Per Line Register
Clipping Register for ODD (Chroma) Data Register
Status Register
Vertical Transfer Count Register
Vertical Delay Count Register
ADSP-SC58x EPPI Register Descriptions
18–53

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