Analog Devices ADSP-SC58 Series Hardware Reference Manual page 88

Delay Line DMA.................................................................................................................................... 39–13
ADSP-SC58x EMDMA Register Descriptions ......................................................................................... 39–15
External Base Address Register .............................................................................................................. 39–17
Circular Buffer Length Register ............................................................................................................. 39–18
Chain Pointer Register .......................................................................................................................... 39–19
Internal Count Register ......................................................................................................................... 39–20
External Count Register ........................................................................................................................ 39–21
External Memory DMA Control Register .............................................................................................. 39–22
Internal Index Register .......................................................................................................................... 39–26
External Index Register .......................................................................................................................... 39–27
Internal Modifier Register ..................................................................................................................... 39–28
External Modifier Register ..................................................................................................................... 39–29
Delay Line Tap Count Register ............................................................................................................. 39–30
Tap List Pointer Register ....................................................................................................................... 39–31
Cyclic Redundancy Check (CRC)
CRC Features............................................................................................................................................... 40–1
CRC Functional Description ....................................................................................................................... 40–2
ADSP-SC58x CRC Register List .............................................................................................................. 40–2
ADSP-SC58x CRC Interrupt List ........................................................................................................... 40–3
CRC Definitions ...................................................................................................................................... 40–3
CRC Block Diagram.................................................................................................................................... 40–4
Peripheral DMA Bus ................................................................................................................................ 40–5
MMR Access Bus...................................................................................................................................... 40–5
Mirror Block............................................................................................................................................. 40–5
Data FIFO................................................................................................................................................ 40–5
DMA Request Generator.......................................................................................................................... 40–5
CRC Engine ............................................................................................................................................. 40–5
Compare Logic ......................................................................................................................................... 40–5
CRC Architectural Concepts........................................................................................................................ 40–6
lxxxviii ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference