Analog Devices ADSP-SC58 Series Hardware Reference Manual page 200

CDU Configuration
The registers control the configuration of the clock multiplexors. CDU0_CFG[n] corresponds to
CDU_CFG[n]
output clock CDU_CLKO[n].
SEL (R/W)
Select Clock Input
LOCK (R/W)
Lock Bit
Figure 4-9: CDU_CFG[n] Register Diagram
Table 4-5: CDU_CFG[n] Register Fields
Bit No.
(Access)
31 LOCK
(R/W)
2:1 SEL
(R/W)
0 EN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15 14 13 12 11 10 9
0 0 0 0 0 0 0
31 30 29 28 27 26 25
0 0 0 0 0 0 0
Bit Name
Lock Bit.
Select Clock Input.
Clock Output Enabled.
The CDU_CFG[n].EN bit enables clock output.
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
24 23 22 21 20 19 18 17
0 0 0 0 0 0 0 0
Description/Enumeration
0 IN0_CLKOn Selected
1 IN1_CLKOn Selected
2 IN2_CLKOn Selected
3 IN3_CLKOn Selected
ADSP-SC58x CDU Register Descriptions
0
1
EN (R/W)
Clock Output Enabled
16
0
4–9