Analog Devices ADSP-SC58 Series Hardware Reference Manual page 906

Sharc+ processor
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FS1 Period Register / EPPI Active Samples Per Line Register
The
EPPI_FS1_PASPL
transmit mode.
In GP 1, 2, or 3 FS modes, the
contains the period required for EPPI_FS1 based on the EPPI_CLK clock.
In GP transmit mode with the EPPI_CTL.BLANKGEN bit set, this register contains the number of samples of
active video or vertical blanking samples per line. When used for blanking generation, only the lower 16 bits are
valid.
Note that a value of 0 for this register is illegal. If programmed as 0, the EPPI regards the
register as containing 1.
VALUE[31:16] (R/W)
Frame Sync Period or Samples Number
Figure 18-20: EPPI_FS1_PASPL Register Diagram
Table 18-54: EPPI_FS1_PASPL Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register content varies depending on whether the EPPI is in GP1/2/3 FS modes or in GP
EPPI_FS1_PASPL
15
0
VALUE[15:0] (R/W)
Frame Sync Period or Samples Number
31
0
Bit Name
Frame Sync Period or Samples Number.
In GP 1, 2, or 3 FS modes, the EPPI_FS1_PASPL.VALUE bit field is used for the
generation of frame sync 1 and contains the period required for EPPI_FS1 based on
the EPPI_CLK clock. In GP transmit mode with the EPPI_CTL.BLANKGEN bit
set, this bit field contains the number of samples of active video or vertical blanking
samples per line.
register is used for the generation of frame sync 1. The register
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x EPPI Register Descriptions
EPPI_FS1_PASPL
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
18–67

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