Analog Devices ADSP-SC58 Series Hardware Reference Manual page 605

Sharc+ processor
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Table 14-13: PORT_DIR_CLR Register Fields (Continued)
Bit No.
(Access)
13
PX13
(R/W1C)
12
PX12
(R/W1C)
11
PX11
(R/W1C)
10
PX10
(R/W1C)
9
PX9
(R/W1C)
8
PX8
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 13 Direction Clear.
The PORT_DIR_CLR.PX13 bit disables output mode and the output drivers for
port x.
Port x Bit 12 Direction Clear.
The PORT_DIR_CLR.PX12 bit disables output mode and the output drivers for
port x.
Port x Bit 11 Direction Clear.
The PORT_DIR_CLR.PX11 bit disables output mode and the output drivers for
port x.
Port x Bit 10 Direction Clear.
The PORT_DIR_CLR.PX10 bit disables output mode and the output drivers for
port x.
Port x Bit 9 Direction Clear.
The PORT_DIR_CLR.PX9 bit disables output mode and the output drivers for port
x.
Port x Bit 8 Direction Clear.
The PORT_DIR_CLR.PX8 bit disables output mode and the output drivers for port
x.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
14–33

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