Analog Devices ADSP-SC58 Series Hardware Reference Manual page 747

Table 16-19: SPI_CTL Register Fields (Continued)
Bit No.
(Access)
7 SELST
(R/W)
6 ASSEL
(R/W)
5 CPOL
(R/W)
4 CPHA
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Slave Select Polarity Between Transfers.
The SPI_CTL.SELST bit selects the state (polarity) for the SPI_SEL[n] pin be-
tween SPI transfers when the SPI is a master and hardware slave select assertion is ena-
bled (SPI_CTL.ASSEL =1). In slave mode, this bit affects the detection of both
transmit collision (SPI_STAT.TC and underrun (SPI_STAT.TUR) errors.
Slave Select Pin Control.
The SPI_CTL.ASSEL bit selects whether the SPI hardware sets the SPI_SEL[n]
pin output value (ignoring the slave select SPI_SLVSEL.SSEL1 -
SPI_SLVSEL.SSEL7 bits) or whether software control of the slave select bits set
the SPI_SEL[n] pin output value. This feature is applicable only when the SPI is a
master.
When hardware control is enabled, the SPI_SEL[n] pin output is asserted during
the transfers, and the pin polarity between transfers is selected by the
SPI_CTL.SELST bit.
When software control is enabled, the SPI_SEL[n] pin output value is set through
software control of the slave select bits, and as such, the pin may either remain asserted
(low) or be deasserted between transfers.
Clock Polarity.
The SPI_CTL.CPOL bit selects whether the SPI uses an active-low or active-high
signal for the SPI clock (SPI_CLK). This bit works with the SPI_CTL.CPHA bit to
select combinations of clock phase and polarity for the SPI_CLK pin. This bit can
only be changed when the SPI is disabled.
Clock Phase.
The SPI_CTL.CPHA bit selects whether the SPI starts toggling the signal for the SPI
clock (SPI_CLK) from the start of the first data bit or from the middle of the first
data bit. The SPI_CTL.CPHA bit works with the SPI_CTL.CPOL bit to select
combinations of clock phase and polarity for the SPI_CLK pin. This bit can only be
changed when the SPI is disabled.
ADSP-SC58x SPI Register Descriptions
Description/Enumeration
0 Deassert slave select (high)
1 Assert slave select (low)
0 Software slave select control
1 Hardware slave select control
0 Active-high SPI CLK
1 Active-low SPI CLK
0 SPI CLK toggles from middle
1 SPI CLK toggles from start
16–41