Analog Devices ADSP-SC58 Series Hardware Reference Manual page 852

Sharc+ processor
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EPPI Operating Modes
EPPI Operating Modes
The EPPI supports various receive and transmit modes of operation which include the detection and generation of
preamble data. Specifically, the EPPI supports data formats described in the specifications ITU656, SMPTE 274M
and SMPTE 296M. In addition to these modes, the EPPI also supports general-purpose receive and transmit using
up to three frame syncs (FS).
The control register (EPPI_CTL) includes most of the bits used for configuring operating modes. The "Register
Descriptions" section of this chapter provides complete descriptions of these bits.
ITU-R 656 Modes
The EPPI supports three input modes and one output mode for ITU-R 656 framed data. This section describes
these modes.
ITU-R 656 Background
In ITU-R 656 mode, the horizontal (H), vertical (V), and field (F) signals are sent as an embedded part of the video
data stream. The signals are sent in a series of bytes that form a control word. ITU-R 656 was formerly known as
CCIR-656.
The letter H is used to distinguish between the start of active video (SAV) and end of active video (EAV) signals.
These signals indicate the beginning and end of active video data in each line. The SAV occurs on a 1-to-0 transition
of H, and EAV occurs on a 0-to-1 transition of H. The space between EAV and SAV is filled with horizontal blank-
ing data. Therefore, H = 1 during the horizontal blanking portion of the data stream, and H = 0 during the active
video portion of the data stream.
The letter V is used to denote the vertical blanking portion of the data stream. A transition in V can occur only in
the EAV sequence. When V = 1, the data stream contains vertical blanking data, and when V = 0, the data stream
contains active video data.
The letter F is used to distinguish Field 1 from Field 2. Interlaced video has two fields in a frame of data. It requires
each field to be handled uniquely, and alternate rows of each field combined to create the actual video image.
For interlaced video, F = 0 represents Field 1 (Odd Field) and F = 1 represents Field 2 (Even Field). Progressive video
makes no distinction between Field 1 and Field 2, and F is always 0 for progressive video. Interlaced video requires
each field to be handled uniquely because alternate rows of each field combine to create the actual video image.
An entire field of video is comprised of active video plus horizontal blanking (the space between an EAV and SAV
code) and vertical blanking (the space where V = 1). A field of video commences on a transition of the F bit.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
18–13

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