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2. Configure the following bits: UART_CTL.MOD =00, UART_CTL.LOOP_EN =1, UART_CTL.WLS =11 (8-
bit data), and UART_CTL.EN =1
3. Configure the following bits: TIMER_TMR[n]_CFG.TMODE =1101, TIMER_TMR[n]_CFG.OUTDIS
=1, TIMER_TMR[n]_CFG.IRQMODE =10 and enable the timer.
4. Send test data through the host device and wait for the timer interrupt and disable the timer.
The bit rate can be derived from the timer period register value according to the formula provided in the
baud Detection
section.
Using Common Initialization Steps
When using the core or the DMA to execute transfers, the following steps are common to all UART modes.
1. All UART signals are multiplexed and compete with other functions at pin level. First, program the port regis-
ters according to the guidelines in the PORT chapter.
2. Program the
UART_CLK
3. Program the
UART_CTL
Using Core Transfers
Write data into the
UART_THR
tion. If the UART_STAT.DR bit is set, received data can be read from the
Using DMA Transfers
1. Make sure that the UART_IMSK.ETBEI or the UART_IMSK.ERBFI bits are cleared before configuring
the DMA.
2. Configure the dedicated DMA channel.
3. Set the UART_IMSK.ETBEI or UART_IMSK.ERBFI bits to start the transfer.
Using Interrupts
Each UART features three interrupt signal outputs.
1. Enable individual interrupts in the system event controller (SEC).
2. Register IRQ handlers.
3. Use the interrupts mask registers to enable specific IRQ events.
Setting Up Hardware Flow Control
1. Configure automatic or manual hardware flow control for the receiver through the UART_CTL.ARTS bit, or
the transmitter through the UART_CTL.ACTS bit.
2. Configure UART_CTS and UART_RTS polarity through the UART_CTL.FCPOL bit.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register. Refer to
Bit Rate Generation
register and enable the UART clock.
register, when the UART_STAT.THRE bit is set, to initiate a core transmit opera-
topic.
UART_RBR
register.
UART Programming Model
Auto-
17–23
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