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ADSP-SC58x PORT Register Descriptions
Port x GPIO Data Set Register
The
PORT_DATA_SET
mode or input mode. For more information, see the
PX15 (R/W1S)
Port x Bit 15 Data Set
PX14 (R/W1S)
Port x Bit 14 Data Set
PX13 (R/W1S)
Port x Bit 13 Data Set
PX12 (R/W1S)
Port x Bit 12 Data Set
PX11 (R/W1S)
Port x Bit 11 Data Set
PX10 (R/W1S)
Port x Bit 10 Data Set
PX9 (R/W1S)
Port x Bit 9 Data Set
PX8 (R/W1S)
Port x Bit 8 Data Set
Figure 14-9: PORT_DATA_SET Register Diagram
Table 14-10: PORT_DATA_SET Register Fields
Bit No.
(Access)
15
PX15
(R/W1S)
14
PX14
(R/W1S)
13
PX13
(R/W1S)
14–22
register operates differently for port bits/pins, depending on whether the bit/pin is output
15
14
13
12
11
10
0
0
0
0
0
0
31
30
29
28
27
26
0
0
0
0
0
0
Bit Name
Port x Bit 15 Data Set.
Port x Bit 14 Data Set.
Port x Bit 13 Data Set.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
PORT_DATA
register description.
9
8
7
6
5
4
3
2
0
0
0
0
0
0
0
0
25
24
23
22
21
20
19
18
0
0
0
0
0
0
0
0
Description/Enumeration
0 No Effect. Write 0 has no effect in output mode.
1 Set Bit. Write 1 for signal high in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Set Bit. Write 1 for signal high in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Set Bit. Write 1 for signal high in output mode.
1
0
0
0
PX0 (R/W1S)
Port x Bit 0 Data Set
PX1 (R/W1S)
Port x Bit 1 Data Set
PX2 (R/W1S)
Port x Bit 2 Data Set
PX3 (R/W1S)
Port x Bit 3 Data Set
PX4 (R/W1S)
Port x Bit 4 Data Set
PX5 (R/W1S)
Port x Bit 5 Data Set
PX6 (R/W1S)
Port x Bit 6 Data Set
PX7 (R/W1S)
Port x Bit 7 Data Set
17
16
0
0
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