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Fault COP Period Register
The SEC fault COP period register (SEC_FCOPP) contains the width value (count in (SEC) clock cycles) for the
high and low phase of the computer operating properly (COP) toggled output on the COP pin. Note that the actual
high/low phase value is the SEC_FCOPP.COUNT programmed value plus 1.
COUNT[31:16] (R/W)
Fault COP Period
Figure 7-15: SEC_FCOPP Register Diagram
Table 7-14: SEC_FCOPP Register Fields
Bit No.
(Access)
31:0
COUNT
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
0
COUNT[15:0] (R/W)
Fault COP Period
31
0
Bit Name
Fault COP Period.
The SEC_FCOPP.COUNT bit field is the width value for the high and low phase of
the computer operating properly (COP) toggled output on the COP pin.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SEC Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
7–37
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