Analog Devices ADSP-SC58 Series Hardware Reference Manual page 703

Table 15-10: LP_STAT Register Fields (Continued)
Bit No.
(Access)
3 ROVF
(R/W1C)
1 LRRQ
(R/W1C)
0 LTRQ
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Receive FIFO Overflow Interrupt.
This interrupt is generated when the receiver FIFO overflows. This overflow may hap-
pen if the transmitter continues to transmit data even though the receiver has de-as-
serted the LP_ACK pin.
Receive Request.
The LP generates this interrupt when the LP_CLK pin of a disabled link port (the re-
ceiver) is forced high by another link port (the transmitter).
Transmit Request.
The LP generates this interrupt when the LP_ACK pin of a disabled link port (the
transmitter) is forced high by another link port (the receiver).
ADSP-SC58x LP Register Descriptions
Description/Enumeration
1 TX - Reserved ; RX - Has 1 data word RX has 1 word of
data. TX reserved
2 TX - Reserved; RX - Has 2 data words RX has 2 word
of data. TX reserved.
3 TX - Reserved; RX - Has 3 data words RX has 3 word
of data. TX reserved.
4 TX - One Word; RX -Has 4 data words RX has 4 word
of data. TX 1 word of data.
5 Reserved
6 TX - FIFO Full; RX - Reserved RX reserved. TX re-
served.
7 Reserved
15–23