Analog Devices ADSP-SC58 Series Hardware Reference Manual page 71

PPS 3 Target Time Nanoseconds Register ........................................................................................... 31–358
PPS 3 Target Time Seconds Register ................................................................................................... 31–359
PPS 3 Width Register .......................................................................................................................... 31–360
PPS Control Register ........................................................................................................................... 31–361
Time Stamp Low Seconds Register ...................................................................................................... 31–364
Time Stamp Seconds Update Register ................................................................................................. 31–365
Time Stamp Status Register ................................................................................................................. 31–366
Time Stamp Sub Second Increment Register ....................................................................................... 31–369
Tx 1024- to Max-Byte Frames (Good/Bad) Register ............................................................................ 31–370
Tx 128- to 255-Byte Frames (Good/Bad) Register ............................................................................... 31–371
Tx 256- to 511-Byte Frames (Good/Bad) Register ............................................................................... 31–372
Tx 512- to 1023-Byte Frames (Good/Bad) Register ............................................................................. 31–373
Tx 64-Byte Frames (Good/Bad) Register ............................................................................................. 31–374
Tx 65- to 127-Byte Frames (Good/Bad) Register ................................................................................. 31–375
Tx Broadcast Frames (Good) Register .................................................................................................. 31–376
Tx Broadcast Frames (Good/Bad) Register .......................................................................................... 31–377
Tx Carrier Error Register ..................................................................................................................... 31–378
Tx Deferred Register ........................................................................................................................... 31–379
Tx Excess Collision Register ................................................................................................................ 31–380
Tx Excess Deferral Register ................................................................................................................. 31–381
Tx Frame Count (Good) Register ........................................................................................................ 31–382
Tx Frame Count (Good/Bad) Register ................................................................................................. 31–383
Tx Late Collision Register ................................................................................................................... 31–384
Tx Multicast Frames (Good) Register .................................................................................................. 31–385
Tx Multicast Frames (Good/Bad) Register ........................................................................................... 31–386
Tx Multiple Collision (Good) Register ................................................................................................ 31–387
Tx Octet Count (Good) Register ......................................................................................................... 31–388
Tx OCT Count (Good/Bad) Register .................................................................................................. 31–389
Number of Tx Frames (Good) greater than maxsize ............................................................................ 31–390
Tx Pause Frame Register ...................................................................................................................... 31–391
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference lxxi