Analog Devices ADSP-SC58 Series Hardware Reference Manual page 180

System Clock Buffer Disable Register
The
CGU_SCBF_DIS
OUTCLKBF (R/W)
OCLK Buffer
DCLKBF (R/W)
DCLK Buffer
LOCK (R/W)
Lock
Figure 3-11: CGU_SCBF_DIS Register Diagram
Table 3-17: CGU_SCBF_DIS Register Fields
Bit No.
(Access)
31 LOCK
(R/W)
3 OUTCLKBF
(R/W)
2 DCLKBF
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register controls each system's clock buffer to determine if the SCLKn buffer is enabled.
15 14 13 12
0 0 0 0
31 30 29 28
0 0 0 0
Bit Name
Lock.
The CGU_SCBF_DIS.LOCK bit allows writes to the
when cleared (=0) or blocks writes if set (=1) and the SPU_CTL.GLCK bit is set.
OCLK Buffer.
The CGU_SCBF_DIS.OUTCLKBF bit enables (=0, default) or disables (=1) OCLKs
buffer.
DCLK Buffer.
The CGU_SCBF_DIS.DCLKBF bit enables (=0, default) or disables (=1) DCLKs
buffer.
11 10 9 8 7 6 5 4
0 0 0 0 0 0 0 0
27 26 25 24 23 22 21 20
0 0 0 0 0 0 0 0
Description/Enumeration
0 Unlock register
1 Lock register
0 Enable buffer
1 Disable buffer
0 Enable buffer
1 Disable buffer
ADSP-SC58x CGU Register Descriptions
3 2 1 0
0 0 0 0
SCLK0BF (R/W)
SCLK0 Buffer
SCLK1BF (R/W)
SCLK1 Buffer
19 18 17 16
0 0 0 0
CGU_SCBF_DIS register
3–29