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Bank 2 Control Register ........................................................................................................................ 11–33
Bank 2 Extended Timing Register ......................................................................................................... 11–36
Bank 2 Timing Register ......................................................................................................................... 11–38
Bank 3 Control Register ........................................................................................................................ 11–40
Bank 3 Extended Timing Register ......................................................................................................... 11–43
Bank 3 Timing Register ......................................................................................................................... 11–45
One-Time Programmable Memory Controller (OTPC)
OTPC Features............................................................................................................................................ 12–1
Error Correction .......................................................................................................................................... 12–1
OTP Layout................................................................................................................................................. 12–1
OTPC Event Control................................................................................................................................... 12–2
OTPC Interrupt Signals ........................................................................................................................... 12–3
OTPC Status and Error Signals ................................................................................................................ 12–3
OTP API Overview ..................................................................................................................................... 12–3
OTP Programming................................................................................................................................... 12–3
OTP Program ...................................................................................................................................... 12–3
OTP Reading ........................................................................................................................................... 12–4
OTP Get Field ..................................................................................................................................... 12–4
OTP Counters.......................................................................................................................................... 12–6
Lock API .................................................................................................................................................. 12–6
ADSP-SC58x OTPC Interrupt List ............................................................................................................ 12–7
ADSP-SC58x OTPC Register Descriptions ................................................................................................ 12–7
OTP Security State Register .................................................................................................................... 12–8
OTP Status Register ................................................................................................................................ 12–9
System Memory Protection Unit (SMPU)
SMPU Features............................................................................................................................................ 13–1
SMPU Functional Description .................................................................................................................... 13–2
ADSP-SC58x SMPU Register List ........................................................................................................... 13–3
ADSP-SC58x SMPU Interrupts ............................................................................................................... 13–4
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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