Analog Devices ADSP-SC58 Series Hardware Reference Manual page 176

Table 3-14: CGU_OSCWDCTL Register Fields (Continued)
Bit No.
(Access)
12:8 BOUF
(R/W)
7 CNGEN
(R/W)
6 HODEN
(R/W)
5:0 HODF
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Bad Oscillator Upper Frequency limit.
The CGU_OSCWDCTL.BOUF bits indicate the desired upper fail limit for the bad os-
cillation detection.
Clock not Good enabled.
The CGU_OSCWDCTL.CNGEN bit enables the detection of an oscillator watchdog
clock fault.
Harmonic Oscillation Detection enabled.
The CGU_OSCWDCTL.HODEN bit enables harmonic oscillation detection.
Watchdog lower frequency limit.
The CGU_OSCWDCTL.HODF bit field is used to indicate the desired lower fail limit
for the harmonic oscillation detection in MHz.
ADSP-SC58x CGU Register Descriptions
Description/Enumeration
0 Enable buffer
1 Disable buffer
3–25