Analog Devices ADSP-SC58 Series Hardware Reference Manual page 50

Functional Description ................................................................................................................................ 28–3
ADSP-SC58x MLB Register List.............................................................................................................. 28–4
ADSP-SC58x MLB Interrupt List ........................................................................................................... 28–5
Media LB Protocol ................................................................................................................................... 28–5
MLB Architectural Concepts ....................................................................................................................... 28–6
MediaLB Block Diagram .......................................................................................................................... 28–6
MediaLB Interface.................................................................................................................................... 28–7
Routing Fabric.......................................................................................................................................... 28–8
Data Buffer RAM.................................................................................................................................. 28–8
Channel Table RAM ............................................................................................................................. 28–8
Address Mapping ............................................................................................................................... 28–8
Channel Allocation Table................................................................................................................... 28–9
Channel Set Up................................................................................................................................ 28–10
Channel Descriptor Tables ............................................................................................................... 28–11
AHB Descriptor Table (ADT).......................................................................................................... 28–15
Interrupt Interface Block ........................................................................................................................ 28–19
Operating Modes ....................................................................................................................................... 28–20
Isochronous Data Exchange.................................................................................................................... 28–20
Asynchronous and Control Data Exchange............................................................................................. 28–21
Synchronous Data Exchange................................................................................................................... 28–22
Data Transfer............................................................................................................................................. 28–22
DMA...................................................................................................................................................... 28–23
Programming Model.................................................................................................................................. 28–23
Channel Initialization............................................................................................................................. 28–23
Configure the Hardware...................................................................................................................... 28–23
Program the CAT and the CDT.......................................................................................................... 28–23
Program the ADT ............................................................................................................................... 28–24
Service .................................................................................................................................................... 28–25
Servicing the DMA Channel Interrupts............................................................................................... 28–26
Servicing the MediaLB Status Interrupts ............................................................................................. 28–26
Polling for MediaLB System Commands............................................................................................. 28–27
l ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference