Analog Devices ADSP-SC58 Series Hardware Reference Manual page 74

Rate Control for Group 0 Register ........................................................................................................ 32–48
Rate Control for Group 1 Register ........................................................................................................ 32–50
Status Register ....................................................................................................................................... 32–52
Digital Audio Interface (DAI)
SRU Features ............................................................................................................................................... 33–1
Functional Description ................................................................................................................................ 33–2
ADSP-SC58x DAI Register List ............................................................................................................... 33–2
ADSP-SC58x DAI Interrupt List ............................................................................................................ 33–4
DAI Block Diagram.................................................................................................................................. 33–4
DAI Signal Naming Conventions ............................................................................................................ 33–5
I/O Pin Buffers......................................................................................................................................... 33–5
Pin Buffer Signals.................................................................................................................................. 33–6
Pin Buffer Input Signal ...................................................................................................................... 33–6
Pin Buffer Enable Signal .................................................................................................................... 33–6
Pin Buffer Input Level State............................................................................................................... 33–6
Pin Buffer Functions ............................................................................................................................. 33–7
Pin Buffers as Signal Input................................................................................................................. 33–7
Pin Buffers As Signal Output ............................................................................................................. 33–7
DAI Pin Buffer Status ........................................................................................................................ 33–8
DAIn Peripherals ...................................................................................................................................... 33–8
Output Signals With Pin Buffer Enable Control ................................................................................... 33–8
Output Signals Without Pin Buffer Enable Control.............................................................................. 33–8
Signal Routing Units (SRUs) .................................................................................................................... 33–8
Cross Mode Connections ...................................................................................................................... 33–9
Signal Routing Matrix by Groups........................................................................................................ 33–10
DAI Group Routing ............................................................................................................................ 33–11
Rules for SRU Connections................................................................................................................. 33–12
Miscellaneous Buffers and Functions...................................................................................................... 33–13
DAI Routing Capabilities ....................................................................................................................... 33–13
DAI Default Routing .......................................................................................................................... 33–15
lxxiv ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference