Analog Devices ADSP-SC58 Series Hardware Reference Manual page 311

Sharc+ processor
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ADSP-SC58x GICDST Register Descriptions
Software Generated Interrupt Control Register
The
GICDST_SGI_CTL
has any effect when the forwarding of interrupts by Distributor is disabled by the GICD_CTLR settings.
SATT (R/W)
Security Value of the SGI
TRGLSTFILT (R/W)
Target List Filter
Figure 7-35: GICDST_SGI_CTL Register Diagram
Table 7-36: GICDST_SGI_CTL Register Fields
Bit No.
(Access)
25:24
TRGLSTFILT
(R/W)
23:16
CPUTRGTLST
(R/W)
7–66
register controls the generation of SGIs.It is implementation defined whether this register
15
14
13
12
11
10
0
0
0
0
0
0
31
30
29
28
27
26
0
0
0
0
0
0
Bit Name
Target List Filter.
The GICDST_SGI_CTL.TRGLSTFILT bit field determines how the distributor
must process the requested SGI.
CPU Target list.
When the GICDST_SGI_CTL.CPUTRGTLST bit field TargetList Filter = 0b00, de-
fines the CPU interfaces to which the Distributor must forward the interrupt.
Each bit of the GICDST_SGI_CTL.CPUTRGTLST bit field refers to the corre-
sponding CPU interface, for example CPUTargetList[0] corresponds to CPU interface
0. Setting a bit to 1 indicates that the interrupt must be forwarded to the correspond-
ing interface. If this field is 0x00 when TargetListFilter is 0b00, the Distributor does
not forward the interrupt to any CPU interface.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9
8
7
6
5
4
3
2
0
0
0
0
0
0
0
0
25
24
23
22
21
20
19
18
17
0
0
0
0
0
0
0
0
Description/Enumeration
0 Forward the interrupt to the CPU interfaces specified in
the CPUTargetList field
1 Forward the interrupt to all CPU interfaces except that
of the processor that requested the interrupt
2 Forward the interrupt only to the CPU interface of the
processor that requested the interrupt
3 Reserved
1
0
0
0
SGIINTID (R/W)
The Interrupt ID of the SGI
16
0
0
CPUTRGTLST (R/W)
CPU Target list

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