Table 14-9: PORT_DATA_CLR Register Fields (Continued)
Bit No.
(Access)
1
PX1
(R/W1C)
0
PX0
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 1 Data Clear.
The PORT_DATA_CLR.PX1 bit clears the pin without impacting other pins of the
port.
Port x Bit 0 Data Clear.
The PORT_DATA_CLR.PX0 bit clears the pin without impacting other pins of the
port.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
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