Analog Devices ADSP-SC58 Series Hardware Reference Manual page 387

Table 9-6: L2CTL_CTL Register Fields (Continued)
Bit No.
(Access)
2 BK2EDIS
(R/W)
1 BK1EDIS
(R/W)
0 BK0EDIS
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Bank 2 ECC Disable.
The L2CTL_CTL.BK2EDIS bit disables L2 bank 2 ECC operation.
Bank 1 ECC Disable.
The L2CTL_CTL.BK1EDIS bit disables L2 bank 1 ECC operation.
Bank 0 ECC Disable.
The L2CTL_CTL.BK0EDIS bit disables L2 bank 0 ECC operation.
ADSP-SC58x L2CTL Register Descriptions
Description/Enumeration
0 Enable ECC
1 Disable ECC
0 Enable ECC
1 Disable ECC
0 Enable ECC
1 Disable ECC
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