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Data Enable in General-Purpose 2 Frame Sync Transmit Mode .......................................................... 18–21
General-Purpose 3 Frame Sync Mode.................................................................................................. 18–21
Supported Data Formats ........................................................................................................................ 18–22
Receive Data Formats .......................................................................................................................... 18–22
Transmit Data Formats ....................................................................................................................... 18–24
Data Transfer Modes .............................................................................................................................. 18–25
Data Packing for Receive Modes ......................................................................................................... 18–25
Data Packing for Transmit Modes ....................................................................................................... 18–26
Sign-Extended and Zero-Filled Data ................................................................................................... 18–26
Split Receive Modes ............................................................................................................................ 18–26
Split Transmit Modes .......................................................................................................................... 18–27
Clock Gating....................................................................................................................................... 18–27
Support for Delayed Start of EPPI Frame Syncs .................................................................................. 18–27
Ignoring Premature External Frame Syncs for Data Consistency ......................................................... 18–28
EPPI Event Control ................................................................................................................................... 18–28
EPPI Status, Error, and Interrupt Signals ............................................................................................... 18–29
Frame and Line Track Errors ............................................................................................................... 18–29
Line Track Errors ............................................................................................................................. 18–29
Frame Track Errors........................................................................................................................... 18–29
Preamble Error Not Corrected Error ................................................................................................... 18–30
EPPI Programming Model ........................................................................................................................ 18–30
Receiving ITU-R 656 Frames ................................................................................................................ 18–30
Transmitting ITU-R 656 Frames in GP Transmit Modes ....................................................................... 18–30
Configuring Transfers in GP 0 FS Mode ............................................................................................... 18–31
Configuring Transfers in GP 1 FS Mode ............................................................................................... 18–31
Configuring Transfers in GP 2 FS Mode ............................................................................................... 18–32
Configuring Transfers in GP 3 FS Mode ............................................................................................... 18–33
Configuring the EPPI to Use the Windowing Feature ............................................................................ 18–33
EPPI Mode Configuration...................................................................................................................... 18–34
Configuring 8-Bit Receive Mode ......................................................................................................... 18–34
Configuring 10/12/14-Bit Receive Modes........................................................................................... 18–35
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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