Analog Devices ADSP-SC58 Series Hardware Reference Manual page 880

Sharc+ processor
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Table 18-24: 8-bit Split Receive Mode with SKIPEN = 0 and SWAPEN = 1
Pin Data
SPLTEO=1
(8 bits)
SUBSPLTODD=0
SWAPEN=1
SKIPEN=0
SKIPEO=X
DMACFG=1
PRIMARY
DMA
CHANNEL
V
0
Y
0
U
0
Y
1
V
1
Y
2
U
1
Y
Y
Y
Y
3
0
1
2
V
2
Y
4
U
2
Y
5
V
3
Y
6
U
3
Y
Y
Y
Y
7
4
5
6
V
4
When the bits settings are EPPI_CTL.SPLTEO =1, EPPI_CTL.SUBSPLTODD =1 and EPPI_CTL.DMACFG
=0, the EPPI packs the second Chroma component sent over the DMA bus completely before the Luma compo-
nent. However, it is intentionally held until that previous word is moved out. This functionality allows the separa-
tion of Luma and Chroma values into individual buffers when using 2D-DMA. The second Chroma component is
U0U1U2U3 in the 8-bit Split Receive Mode with SKIPEN = 0 and SWAPEN = 0 and 8-bit Split Receive Mode
with SKIPEN = 0 and SWAPEN = 1 tables. The Luma component is Y4Y5Y6Y7 in the 8-bit Split Receive Mode
with SKIPEN = 0 and SWAPEN = 1 table.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SECONDARY
DMA
CHANNEL
V
U
V
U
0
0
1
1
Y
3
V
U
V
U
2
2
3
3
Y
7
SPLTEO=1
SUBSPLTODD=1
SWAPEN=1
SKIPEN=0
SKIPEO=X
DMACFG=0
DMACFG=1
PRIMARY
PRIMARY
DMA
DMA
CHANNEL
CHANNEL
V
U
V
U
0
0
1
1
Y
Y
Y
Y
Y
Y
Y
Y
0
1
2
3
0
1
2
V
U
V
U
2
2
3
3
Y
Y
Y
Y
Y
Y
Y
Y
4
5
6
7
4
5
6
EPPI Mode Configuration
SECONDARY
DMA
CHANNEL
3
V
V
V
V
0
1
2
3
U
U
U
U
0
1
2
3
7
DMACFG=0
PRIMARY
DMA
CHANNEL
Y
Y
Y
Y
0
1
2
3
V
V
V
V
0
1
2
3
Y
Y
Y
Y
4
5
6
7
U
U
U
U
0
1
2
3
18–41

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