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Peripherals Disable Register 1
The
DPM_PER_DIS1
save clock switching power.
VALUE[15:0] (R/W)
Peripheral Disable
LOCK (R/W)
Lock Bit
Figure 5-3: DPM_PER_DIS1 Register Diagram
Table 5-7: DPM_PER_DIS1 Register Fields
Bit No.
(Access)
31
LOCK
(R/W)
18:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register is used to shut off the clocks to peripherals that are not used in an application to
15
14
13
12
11
0
0
0
0
0
31
30
29
28
27
0
0
0
0
0
Bit Name
Lock Bit.
Peripheral Disable.
The DPM_PER_DIS1.VALUE bits are used to shut of clocks in individual peripher-
als.
10
9
8
7
6
5
4
3
0
0
0
0
0
0
0
0
26
25
24
23
22
21
20
19
0
0
0
0
0
0
0
0
Description/Enumeration
0 TWI0
1 TWI1
2 TWI2
3 USB0
4 USB1
5 Reserved
6 Reserved
7 Reserved
8 Reserved
9 Reserved
10 Reserved
11 Reserved
12 Reserved
13 Reserved
ADSP-SC58x DPM Register Descriptions
2
1
0
0
0
0
18
17
16
0
0
0
VALUE[18:16] (R/W)
Peripheral Disable
5–9
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