Analog Devices ADSP-SC58 Series Hardware Reference Manual page 278

Sharc+ processor
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SCI Source ID Register n
The SCI source ID register (SEC_CSID[n]) contains the source ID of the interrupt last issued to core n. The
SEC_CSID[n]
register value is loaded by the SCI when a system interrupt indication is sent to core n. The SCI
does not change the
SEC_CSID[n]
ing to the
SEC_CSID[n]
ter.
Figure 7-12: SEC_CSID[n] Register Diagram
Table 7-11: SEC_CSID[n] Register Fields
Bit No.
(Access)
7:0
SID
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
until after the interface receives an interrupt acknowledge from core n. Writ-
register generates an interrupt acknowledge, but does not update the value in the regis-
15
14
13
12
0
0
0
0
SID (R)
Source ID
31
30
29
28
0
0
0
0
Bit Name
Source ID.
The SEC_CSID[n].SID bit is the source ID of the interrupt last issued to core n.
11
10
9
8
7
6
5
4
0
0
0
0
0
0
0
0
27
26
25
24
23
22
21
20
19
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SEC Register Descriptions
3
2
1
0
0
0
0
0
18
17
16
0
0
0
0
7–33

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