Analog Devices ADSP-SC58 Series Hardware Reference Manual page 271

ADSP-SC58x SEC Register Descriptions
Table 7-6: SEC_CCTL[n] Register Fields (Continued)
Bit No.
(Access)
1 RESET
(R0/W)
0 EN
(R/W)
7–26
Bit Name
Reset.
When set, the SEC_CCTL[n].RESET bit resets all SCI registers to their default val-
ues.
Enable.
The SEC_CCTL[n].EN bit controls operation of the SCI. Clearing the
SEC_CCTL[n].EN bit halts the execution of the SCI without resetting status regis-
ters. (The INT signal to a core is not affected.) Setting the SEC_CCTL[n].EN bit
enables the SCI to begin or resume operation with the current configuration and sta-
tus.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No Action
1 Reset
0 Disable
1 Enable