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EPPI Functional Description
SMPTE 274M
An HD standard defining the spatial resolution (image sample structure) and frame rates for 1920x1080.
SMPTE 296M
An HD standard for defining the spatial resolution (image sample structure) and frame rates fro 1280x720.
EPPI Block Diagram
The EPPI Block Diagram figure shows the functional blocks within the EPPI.
Figure 18-3: EPPI Block Diagram
EPPI Architectural Concepts
The following sections describe the architectural concepts.
•
EPPI Interface
•
Reset Operation
•
Frame Sync Polarity and Sampling Edge
•
Direct Memory Access (DMA)
•
EPPI Clock
EPPI Interface
A block diagram of the architecture for the EPPI interface is shown in the EPPI DMA Interface figure.
18–8
EPPI_CLKDIV
EPPI Error
SEC
32
PERIPHERAL
BUS
DMA
CONTROLLER
32
32
CHANNEL 1
U/V FIFO
32
32
CHANNEL 0
Y FIFO
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SCL K
EPPI_CLK_TIMER
EPPI_STAT
EPPI_FS1_TIMER
EPPI_FS1...
EPPI_FS2_TIMER
EPPI_FS2...
Data Re-arrange
and Control Unit
EPPI_CTL
EPPI_V/HDLY
EPPI_V/HCNT
EPPI
EPPI_FRAME
CORE
EPPI_LINE
EPPI_ODDCLIP
EPPI_EVENCLIP
CLK
FS1
FS2
FS3
DATA
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