Analog Devices ADSP-SC58 Series Hardware Reference Manual page 755

Interrupt Mask Register
The register unmasks (enables) or masks (disables) SPI interrupt requests. When a condition is indicat-
SPI_IMSK
ed by a bit in the SPI_STAT
latches the interrupt request bit in the
TF (R)
Transmit Finish
RF (R)
Receive Finish
TS (R)
Transmit Start
RS (R)
Receive Start
MF (R)
Mode Fault
Figure 16-25: SPI_IMSK Register Diagram
Table 16-23: SPI_IMSK Register Fields
Bit No.
(Access)
11 TF
(R/NW)
10 RF
(R/NW)
9 TS
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register and the corresponding interrupt request is unmasked in SPI_IMSK, the SPI
SPI_ILAT
15 14 13 12 11 10 9 8
0 0 0 0 0 0 0 0
31 30 29 28 27 26 25 24
0 0 0 0 0 0 0 0
Bit Name
Transmit Finish.
The SPI_IMSK.TF bit unmasks (enables) or masks (disables) the TF interrupt.
Receive Finish.
The SPI_IMSK.RF bit unmasks (enables) or masks (disables) the RF interrupt.
Transmit Start.
The SPI_IMSK.TS bit unmasks (enables) or masks (disables) the TS interrupt.
register, queuing the interrupt request for service.
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
Description/Enumeration
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
ADSP-SC58x SPI Register Descriptions
RUWM (R)
Receive Urgent Watermark
TUWM (R)
Transmit Urgent Watermark
ROR (R)
Receive Overrun
TUR (R)
Transmit Underrun
TC (R)
Transmit Collision
16–49