Dai/Dpi Peripherals; Output Signals With Pin Buffer Enable Control - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Functional Description
Table 9-3. Miscellaneous DPI Buffer Routing
Register Interrupt
SRU2_INPUT4 DPI_INT_05_I
DPI_INT_06_I
DPI_INT_07_I
SRU2_INPUT5 DPI_INT_08_I
DPI_INT_09_I
DPI_INT_10_I
DPI_INT_11_I
DPI_INT_12_I
DPI_INT_13_I

DAI/DPI Peripherals

There are two categories of peripherals associated with the DAI and DPI.
These are described in the following sections.

Output Signals With Pin Buffer Enable Control

Many peripherals within the DAI/DPI that have bidirectional pins gener-
ate a corresponding pin enable signal. Typically, the settings within a
peripheral's control registers determine if a bidirectional pin is an input or
an output, and is then driven accordingly.

Both the peripheral control registers and the configuration of the
SRU can effect the direction of signal flow in a pin buffer.
from an external perspective for example, when a serial port (SPORT) is
completely routed off-chip, it uses four pins—clock, frame sync, data
channel A, and data channel B. Because all four of these pins comprise the
interface that the serial port presents to the SRU, there are a total of 12
connections as shown in
9-14
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Inputs
Miscellaneous
MISCB0_I
MISCB1_I
MISCB2_I
MISCB3_I
MISCB4_I
MISCB5_I
MISCB6_I
MISCB7_I
MISCB8_I
Figure 9-8.
ADSP-214xx SHARC Processor Hardware Reference
Outputs
Interrupt Signal
Trigger Inversion
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
DPI_PBENxx_I
Routing
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes