Analog Devices ADSP-SC58 Series Hardware Reference Manual page 405

Table 9-21: L2CTL_STAT Register Fields (Continued)
Bit No.
(Access)
1 ERR1
(R/W1C)
0 ERR0
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Error Port 1.
The L2CTL_STAT.ERR1 indicates whether the L2CTL has detected a bus access er-
ror on L2s bus port 1.
Error Port 0.
The L2CTL_STAT.ERR0 indicates whether the L2CTL has detected a bus access er-
ror on L2s bus port 0.
ADSP-SC58x L2CTL Register Descriptions
Description/Enumeration
0 No Error
1 Bus Access Error
0 No Error
1 Bus Access Error
9–33