Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1005

ADSP-SC58x PWM Register Descriptions
Channel A Dead-time Register
The register controls the value of dead-time for channel A independently.
PWM_CHA_DT
Figure 19-60: PWM_CHA_DT Register Diagram
Table 19-38: PWM_CHA_DT Register Fields
Bit No.
(Access)
9:0 VALUE
(R/W)
19–84
15 14 13
0 0 0
VALUE (R/W)
Dead-time value
31 30 29
0 0 0
Bit Name
Dead-time value.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
12 11 10 9 8 7 6 5
0 0 0 0 0 0 0 0
28 27 26 25 24 23 22 21
0 0 0 0 0 0 0 0
Description/Enumeration
4 3 2 1 0
0 0 0 0 0
20 19 18 17 16
0 0 0 0 0