Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1041

ADSP-SC58x PWM Register Descriptions
Table 19-69: PWM_ILAT Register Fields (Continued)
Bit No.
(Access)
17 TMR1PER
(R/W1C)
16 TMR0PER
(R/W1C)
1 TRIP1
(R/W1C)
0 TRIP0
(R/W1C)
19–120
Bit Name
PWMTMR1 Period Latched Interrupt Status.
The PWM_ILAT.TMR1PER bit indicates the latched status of the PWMTMR1 peri-
od boundary interrupt request.
PWMTMR0 Period Boundary Interrupt Latched Status.
The PWM_ILAT.TMR0PER bit indicates the latched status of the PWMTMR0 peri-
od boundary interrupt request.
TRIP1 Interrupt Latched Status.
The PWM_ILAT.TRIP1 bit indicates the latched status of the TRIP1 interrupt re-
quest.
TRIP0 Interrupt Latched Status.
The PWM_ILAT.TRIP0 bit indicates the latched status of the TRIP0 interrupt re-
quest.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No Interrupt Latched
1 Interrupt Latched
0 No Interrupt Latched
1 Interrupt Latched
0 No Interrupt Latched
1 Interrupt Latched
0 No Interrupt Latched
1 Interrupt Latched