Guideline: Control Clocking To Reduce Power Consumption; Embedded Memory Features - Altera Cyclone V Device Handbook

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Related Information

Internal Memory (RAM and ROM) User Guide

Provides more information about .mif files.

Quartus II Handbook

Provides more information about .mif files.

Guideline: Control Clocking to Reduce Power Consumption

Reduce AC power consumption in your design by controlling the clocking of each memory block:

Use the read-enable signal to ensure that read operations occur only when necessary. If your design does

not require read-during-write, you can reduce your power consumption by deasserting the read-enable

signal during write operations, or during the period when no memory operations occur.

Use the Quartus II software to automatically place any unused memory blocks in low-power mode to

reduce static power.

Table 2-5: Memory Features in Cyclone V Devices

This table summarizes the features supported by the embedded memory blocks.

Maximum operating frequency

Total RAM bits (including parity bits)

Address clock enable

Simple dual-port mixed width

True dual-port mixed width

FIFO buffer mixed width

Memory Initialization File (.mif)

Mixed-clock mode

Fully synchronous memory

Asynchronous memory

Embedded Memory Blocks in Cyclone V Devices

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Guideline: Control Clocking to Reduce Power Consumption

Only for flow-through read memory

Altera Corporation

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