Altera Cyclone V Device Handbook page 667

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2013.12.30
Device Initialization Sequence
At initialization, host software must program the following registers in the config group:
• Set the devices_connected register to 1.
• Set the device_width register to 8
• Set the device_main_area_size register to the appropriate value.
• Set the device_spare_area_size register to the appropriate value.
• Set the pages_per_block register according to the parameters of the flash device.
• Set the number_of_planes register according to the parameters of the flash device.
• If the device allows two ROW address cycles, the flag bit of the two_row_addr_cycles register
must be set to 1. The host program can ensure this condition either of the following ways:
• Set the flag bit of the bootstrap_two_row_addr_cycles register to 1 prior to the NAND
flash controller's reset initialization sequence, causing the flash controller to initialize the bit
automatically.
• Set the flag bit of the two_row_addr_cycles register directly to 1.
• Clear the chip_enable_dont_care register in the config group to 0.
The NAND flash controller can identify the flash device features, allowing you to initialize the flash controller
registers to interface correctly with the device, as described in Discovery and Initialization.
However, a few NAND devices do not follow any universally accepted identification protocol. If connected
to such a device, the NAND flash controller cannot identify it correctly. If you are using such a device, your
software must use other means to ensure that the initialization registers are set up correctly.
Related Information
Discovery and Initialization
Device Operation Control
This section provides a list of registers that you need to program while choosing to use multi-plane or cache
operations on the device. If the device does not support multi-plane operations or cache operations, then
these registers can be left at their power-on reset values with no impact on the functionality of the NAND
flash controller. Even if the device supports these sequences, the software may choose not to use these
sequences and can leave these registers at their power-on reset values.
Program the following registers in the config group to achieve the best performance from a given device:
• Set flag bit in the multiplane_operation register in the config group to 1 if the device supports
multi-plane operations to access the data on the flash device connected to the NAND flash controller. If
the flash controller is set up for multi-plane operations, the number of pages to be accessed is always a
multiple of the number of planes in the device.
• If the NAND flash controller is configured for multi-plane operation, and if the device has support for
multi-plane read command sequence, then set the multiplane_read_enable register in the config
group.
• If the device implements multiplane address restrictions, set the flag bit in the
multiplane_addr_restrict register to 1.
• Initialize the die_mask and first_block_of_next_plane registers as per device requirements.
NAND Flash Controller
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on page 10-2
Device Initialization Sequence
Altera Corporation
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