Altera Cyclone V Device Handbook page 742

11-64
Boot Operation for eMMC Card Device
• start_cmd = 1
• disable_boot = 1
• card_number = 0
• All other fields = 0
The controller generates a Command Done interrupt after deasserting the CMD pin of the card
interface.
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed
• The ces bit in the idsts register is set, indicating Boot Data Start timeout
• The ri bit of the idsts register is not set
c. If the Boot Data Start interrupt is received, it indicates that the boot data is being received from the
card device. When the DMA engine is not in internal DMA controller mode, the software driver can
then initiate a data read from the controller based on the rxdr interrupt bit in the rintsts register.
In internal DMA controller mode, the DMA engine starts transferring the data from the FIFO buffer
to the system memory as soon as the level set in the rx_wmark field of the fifoth register is
reached.
At the end of a successful boot data transfer from the card, the following interrupts are generated:
• The cmd bit and dto bit in the rintsts register
• The ri bit in the idsts register, in internal DMA controller mode only
d. If an error occurs in the boot ACK pattern (0b010) or an EBE occurs:
• The controller automatically aborts the boot process by pulling the CMD line high
• The controller generates a Command Done interrupt
• The controller does not generate a Boot ACK Received interrupt
• The application aborts the boot transfer
e. In internal DMA controller mode:
• If the software driver creates more descriptors than required by the received boot data, the extra
descriptors are not closed by the controller. Software cannot reuse the descriptors until they are
closed.
• If the software driver creates fewer descriptors than required by the received boot data, the controller
generates a Descriptor Unavailable interrupt and does not transfer any further data to system
memory.
f. If N is violated between data block transfers, the DRTO interrupt is asserted. In addition, if there
AC
is an error associated with the start or end bit, the SBE or EBE interrupt is also generated.
The boot operation for eMMC card devices is complete. Do not execute the remaining
12. This step handles the case where no start-acknowledge pattern is expected (expect_boot_ack was
set to 0 in step
a. If the Boot Data Start interrupt is not received from the controller within 1 second of initiating the
command
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9).
(step 9), the software driver must write the cmd register with the following fields:
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(step 12).
SD/MMC Controller
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cv_54011
2013.12.30
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